<b><font color="black">Aninda Manocha</font></b>

Latest

• The Implications of Page Size Management on Graph Analytics
• Tiny but Mighty: Designing and Realizing Scalable Latency Tolerance for Manycore SoCs
• GraphFire: Synergizing Fetch, Insertion, and Replacement Policies for Graph Analytics
• AutoSVA: Democratizing Formal Verification of RTL Module Interactions
• GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures
• [Invited Talk] A Simulator and Compiler Framework for Agile Hardware-Software Co-design Evaluation and Exploration
• Bayesian Optimization for Efficient Accelerator Synthesis
• MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems
• Prospector: Synthesizing Efficient Accelerators via Statistical Learning
• [Workshop] Prospector: Synthesizing Efficient Accelerators via Statistical Learning